Parameterized Verification



Giorgio Delzanno

Parameterized Verification
Speaker:
Giorgio Delzanno
Abstract:
Systems composed of a finite but possibly arbitrary number of identical components occur everywhere from hardware design to distributed applications. Parameterized verification is the task of verifying the correctness of this kind of systems regardless the number of their components. In the talk we present some general methodologies for attacking this kind of decision problems. Furthermore, we present recent work based on the application of SMT-solvers for parameterized verification of topology-sensitive distributed protocols with asynchronous communication.
Date:
Thursday, May 3rd, 2018 - 15.00
Location:
DIBRIS, Valletta Puggia, Conference Room 3rd floor

 

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